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Software-Engineering-10IS51-unit-3-->View question


Asked On2017-05-16 06:46:39 by:pallaviaithaln

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Advanced Cache Optimizations

• Reducing hit time
1. Small and simple caches
2. Way prediction
3. Trace caches
• Increasing cache bandwidth
4. Pipelined caches
5. Multibanked caches
6. Nonblocking caches
• Reducing Miss Penalty
7. Critical word first
8. Merging write buffers
• Reducing Miss Rate
9.Compiler optimizations
• Reducing miss penalty or miss rate via parallelism
10.Hardware prefetching
11.Compiler prefetching
Merging Write Buffer to Reduce Miss Penalty
•Write buffer to allow processor to continue while waiting to write to memory
•If buffer contains modified blocks, the addresses can be checked to see if address
of new data matches the address of a valid write buffer entry -If so, new data are
combined with that entry
•Increases block size of write for write-through cache of writes to sequential
words, bytes since multiword writes more efficient to memory
•The Sun T1 (Niagara) processor, among many others, uses write merging


2015-01-20 Answerd By:Anagha

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