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## Consider a 4-way set associative cache consisting of 128 lines with a line size of 64 words. The CPU generates a 20-bit address of a word in main memory. The number of bits in the TAG, LINE and WORD fields are respectively: -computer science-gate-200

Consider a 4-way set associative cache consisting of 128 lines with a line size of 64
words. The CPU generates a 20-bit address of a word in main memory. The number
of bits in the TAG, LINE and WORD fields are respectively:
(A) 9, 6, 5 (8) 7,7,6 (C) 7,5,8 (D) 9,5,6

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Explanation:

Here the number of sets = 128/4 = 32 (as it is 4 say set associative)

We have total 64 words then we need 6 bits to identify the word

So the line offset is 5 bits and the word offset is 6 bits

and the TAG = 20-(5+6) =9 bits

so it should be 9,5,6

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