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You are here:Open notes-->VTU-->ADVANCED-COMPUTER-ARCHITECTURES--10CS74-

ADVANCED COMPUTER ARCHITECTURES 10CS74

How to study this subject



Subject Code: 10CS74 I.A. Marks : 25
Hours/Week : 04 Exam Hours: 03
Total Hours : 52 Exam Marks: 100
PART - A
UNIT – 1 6 Hours
Fundamentals Of Computer Design: Introduction; Classes of computers;
Defining computer architecture; Trends in Technology, power in Integrated
Circuits and cost; Dependability; Measuring, reporting and summarizing
Performance; Quantitative Principles of computer design.
UNIT – 2 6 Hours
Pipelining: Introduction; Pipeline hazards; Implementation of pipeline; What
makes pipelining hard to implement?
UNIT – 3 7 Hours
Instruction –Level Parallelism – 1: ILP: Concepts and challenges; Basic
Compiler Techniques for exposing ILP; Reducing Branch costs with 74
prediction; Overcoming Data hazards with Dynamic scheduling; Hardwarebased
speculation.
UNIT – 4 7 Hours
Instruction –Level Parallelism – 2: Exploiting ILP using multiple issue and
static scheduling; Exploiting ILP using dynamic scheduling, multiple issue
and speculation; Advanced Techniques for instruction delivery and
Speculation; The Intel Pentium 4 as example.
PART - B
UNIT – 5 7 Hours
Multiprocessors and Thread –Level Parallelism: Introduction; Symmetric
shared-memory architectures; Performance of symmetric shared–memory
multiprocessors; Distributed shared memory and directory-based coherence;
Basics of synchronization; Models of Memory Consistency
UNIT – 6 6 Hours
Review of Memory Hierarchy: Introduction; Cache performance; Cache
Optimizations, Virtual memory
UNIT – 7 6 Hours
Memory Hierarchy design: Introduction; Advanced optimizations of Cache
performance; Memory technology and optimizations; Protection: Virtual
memory and virtual machines.
UNIT – 8 7 Hours
Hardware and Software for VLIW and EPIC: Introduction: Exploiting
Instruction-Level Parallelism Statically; Detecting and Enhancing Loop-Level
Parallelism; Scheduling and Structuring Code for Parallelism; Hardware
Support for Exposing Parallelism: Predicated Instructions; Hardware Support
for Compiler Speculation; The Intel IA-64 Architecture and Itanium
Processor; Conclusions.
Text Books:
1. John L. Hennessey and David A. Patterson: Computer Architecture,
A Quantitative Approach, 4
th Edition, Elsevier, 2007.
(Chapter. 1.1 to 1.9, 2.1 to 2.10, 4.1to 4.6, 5.1 to 5.4, Appendix A,
Appendix C, Appendix G)
Reference Books:
1. Kai Hwang: Advanced Computer Architecture Parallelism,
Scalability, Programability, 2
nd Edition, Tata Mc Graw Hill, 2010. 75
2. David E. Culler, Jaswinder Pal Singh, Anoop Gupta: Parallel
Computer Architecture, A Hardware / Software Approach, Morgan
Kaufman, 1999. 



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