View note:Software-Engineering-10IS51-unit-3



Questions of this subject!.

QuestionLikes!Dislikes!Answers!
1)Define Computer Architecture . Illustrate the seven dimensions of an ISA?

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2)What is dependability Explain the two measures of Dependability?

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3)Give the following measurements Frequency of FP operations=25% Average CPI of other instructions=1.33 Average CPI of FP operations=4.0 Frequency of FPSQR=2% CPI of FPSQR = 20 Assume that the two design alternatives are to decrease the CPI of FPSQR to

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4)Explain in briefly measuring, reporting and summarizing performance of computer.

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5)Explain with learning curve how the cost of processor varies with time a long with factors influencing the cost.

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6)Find the number of dies per 200 cm wafer of circular shape that is used to cut die that is 15 cm side and compare the number of dies produced on the same wafer if die is 125 cm.

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7)Define Amdahls law. Derive an expression for CPU clock as a function of instruction count clocks per instruction and clock cycle time.

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8)List and explain four important technologies which has lead to improvements in computer system.

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9)Calculate FIT and MTTF for 10 disks 1M hour MTTF per disk 1 disk controller 05M hour MTTF and 1 power supply 02M hour MTTF.

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10)With a neat diagram explain the classic five stage pipe line for a RISC processor?

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11)What are the major hurdles of pipelining? Illustrate the branch hazard in detail?

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12)Explain how pipe line is implemented in MIPS?

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13)Explain different techniques in reducing pipe line branch penalties?

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14)What are the major hurdles of Pipe lining? Explain briefly.

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15)List and explain five ways of classifying exception in a computer system.

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16)List pipe line hazards Explain any one in detail?

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17)What are the techniques used to reduce branch costs ? Explain both static and dynamic branch prediction used for same?

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18)With a neat diagram give the basic structure of tomasulo based MIPS FP unit and explain the various field of reservation stations?

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19)What are data dependencies? Explain name dependencies with examples between two instructions .?

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20)For the following instructions using dynamic scheduling show the status of ROB reservation station when only MULD is ready to commit and two LD committed.

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21)What is the drawback of 1 - bit dynamic branch prediction method? Clearly state how it is overcome in 2 - bit prediction . Give the state transition diagram of 2 - bit predictor.

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22)Explain the basic VLIW approach for exploiting ILP using multiple issues ?

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23)What are the key issues in implementing advanced speculation techniques Explain them in detail?

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24)Write a note on value predictors?

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25)What are the key issues in implementing advanced speculation techniques Explain them in detail?

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26)Explain the basic schemes for enforcing coherence in a shared memory multiprocessor system?

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27)Explain the directory based coherence for a distributed memory multiprocessor system?

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28)Explain the directory based cache coherence for a distributed memory multiprocessor system along with state transition diagram?

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29)Explain any two hardware primitive to implement synchronization with example?

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30)List and explain any three hardware primitives to implement synchronization.?

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31)Explain the directory based coherence for a distributed memory multiprocessor system ?

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32)Assume we have a computer where the clock per instruction(CPI) i s 1 . 0 when all memory accesses hit the cache . the only data accesses are loads and stores and these total 50 % of the instructions . if the mass penality is 25 clock cycles and the m

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33)Explain in brief ,the types of basic cache optimisation ?

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34)Explain block replacement strategies to replace a block, with example when a cache?

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35)Explain the types of basic cache optimization .

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36)With a diagram, explain organization of data cache in the Microprocessor.

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37)Which are the major categories of the advanced optimization o f cache performance? explain any one in details?

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38)Explain in detail the architecture support for protecting processes from each other via Virtual Memory.

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39)Explain the following advanced optimization of cache 1 Compiler optimizations to reduce miss rate 2 Merging write buffer to reduce miss penalty 3 Non blocking cache to increase cache band width.

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40)Explain internal organization of 64 Mb DRAM?

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41)Explain in detail the hardware support for preserving exception behavior during speculation

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42)Define diagonalization language.

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43)What is the description of Error level E_ERROR?

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44)The practice of separating the user from the true inner workings of an application through well-known interfaces is known as..?

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45) What are some of the common lists that can be used when designing a page?

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46)Describe ruleset?

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47)In which way does bounty programs are used by external developers?

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48)What is the best page size when designing an operating system?

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49)What is SRS document?Build an SRS document for online student feedback system.-Software Engineering-Sem 6-Mumbai university-May 2015

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50)what is problem domain

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51)What are functional and non functional requirements of software?

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52)what are functional and non functional requirements?

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53)Functional Module

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54)Hindusthani music: Describe any one system of classification of Ragas as prevalent in the modern period.

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55)Describe KMP algorithm

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56)In PHP how to know user has read the email?

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57)Which of the following SQL statements contains an error?

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58)which among first fit best fit and worst fit are better and on what basis?

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59)Describe git checkout -- and git checkout -- .

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60)In which language the first version of LESS was written?

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61)The place to start if you want a (new) test tool is: a) Attend a tool exhibition b) Invite a vendor to give a demo c) Analyse your needs and requirements d) Find out what your budget would be for the tool e) Search the internet

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62)When writing API document, what must be considered?

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63) What are the core requirements for a Business Blockchain?

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64)What are the core requirements for a Business Blockchain?

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65)How can I determine who owns a domain name?

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66)Describe the OSI Reference Model

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67)Describe the TCP/IP Reference Model

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68)Describe the working of RSK as a sidechain of Bitcoin.

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69)What regulation and requirements govern bitcoin?

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70)Describe the working of a PoW Blockchain.

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71)What are the System requirements of Unreal Engine?

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